Freescale Semiconductor Technical Data Advance Information DSP56L307 Rev.
6, 2/2005 DSP56L307 24-Bit Digital Signal Processor 3 16 6 6 Memory Expansion Area SCI Triple Timer Address Generation Unit Six Channel DMA Unit Bootstrap ROM Internal Data Bus Switch PIO_EB PM_EB XM_EB YM_EB HI08 ESSI EFCOP Peripheral Expansion Area Program RAM 16 K × 24 bits or 15 K × 24 bits and Instruction Cache 1024 × 24 bits X Data RAM 24 K × 24 bits Y Data RAM 24 K × 24 bits YAB XAB PAB DAB 24-Bit DSP56300 Core DDB YDB XDB PDB GDB External Address Bus Switch 18 Address External Bus Interface and I - Cache Control 13 Control External Data Bus Switch 24 Data Clock Generator PLL Program Int...

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