LP62S1024A-I Series Preliminary Features n Power supply range: 2.
7V to 3.
6V n Access times: 55/70 ns (max.
) n Current: Very low power version: Operating:(70NS)30mA(max.
) (55NS)40mA(max.
) Standby: 5uA (max.
) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.
) n Available in 32-pin TSOP, TSSOP (8X13.
4mm) packages 128K X 8 BIT LOW VOLTAGE CMOS SRAM General Description The LP62S1024A-I is a low operating current 1,048,576bit static random access memory organized as 131,072 words by 8 bits and operates...

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