com 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O Document Title 4Bank x 2M x 16bits Synchronous DRAM Revision History Revision No.
0.
1 1.
0 Initial Draft Release History Draft Date Jul.
2009 Aug.
2009 Remark Preliminary This document is a general product description and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Rev.
1.
0 / Aug.
2009 1 com Synchronous DRAM Memory 128Mbit (8Mx16bit) H57V1262GTR Series H57V1262GTRDESCRIPTION The Hynix H57V1262GTR series is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the memory applications which...

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