Part Number
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CY7C1422AV18 |
Manufacturer
|
Cypress Semiconductor |
Description
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36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
Published
|
Apr 15, 2011 |
Detailed Description
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CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
• 36-Mbi...
|
Datasheet
|
CY7C1422AV18
|
Overview
CY7C1422AV18 CY7C1429AV18 CY7C1423AV18 CY7C1424AV18
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
Features
• 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36) • 300-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz • Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches • Echo clocks (CQ and CQ) simplify data capture in high-speed systems • Synchronous internally self-timed writes • 1.
8V core power supply with HSTL inputs and outputs • Variable drive HSTL output b...
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