IDT9173B Datasheet

IDT9173B VIDEO GENLOCK PLL

The IDT9173B provide the analog PLL circuit blocks to implement a frequency multiplier. Because the device is configured to use an external divider in the PLL clock feedback path, a large divider can be used to result in a large frequency multiplication ratio. This is useful when using a low frequen.

Features

• Phase-detector/VCO circuit block
• Ideal for genlock system
• Reference clock range 12 kHz to 1 MHz for full output clock range
• Output clock range of 1.25 to 75 MHz (-01), and 0.625 to 37.5 MHz (-15). See “Allowable Input Frequency to Output Frequency” table for conditions
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• On-chip loop filter Single 5 V power supply Low power CMOS technology 8-pin SOIC package Block Diagram http://www.DataSheet4U.net/ IDT™ VIDEO GENLOCK PLL 1 IDT9173B REV A 092308 datasheet pdf - http://www.DataSheet4U.net/ IDT9173B VIDEO GENLOCK PLL CLOCK SYNTHESIZER Pin Assignment FBIN IN GND FS0 1 2 3.