HIP7010 ADVANCE INFORMATION August 1996 J1850 Byte Level Interface Circuit Description The Intersil HIP7010, J1850 Byte Level Interface Circuit, is a member of the Intersil family of low-cost multiplexed wiring ICs.
The integrated functions of the HIP7010 provide the system designer with components key to building a “Class B” multiplexed communications network interface, which fully conforms to the VPW Multiplexed Wiring protocol specified in the SAE J1850 Standard.
The HIP7010 is designed to interface with a wide variety of Host microcontrollers via a standard three wire, high-speed (1MHz), synchronous, serial interface.
The HIP7010 automatically produces properly framed VPW messages, prepe...

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