EUP7998 Sink/Source DDR Termination
Regulator
DESCRIPTION
The EUP7998 is a high performance linear
regulator designed to provide power for termination of a DDR memory bus.
It significantly reduces parts count, board space and overall system cost over previous switching solutions.
The EUP7998 maintains a fast transient response using only 20μF or 30μF output capacitance.
The EUP7998 supports a remote sensing function and all power requirements for DDR, DDR2, DDR3 and Low Power DDR3/DDR4 VTT bus termination.
The EUP7998 provides current and thermal limits to prevent damage to the linear
regulator.
Additionally, The EUP7998 generates an open-drain PGOOD signal to monitor the output regulation.
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