HD74ALVC162836 20-bit Universal Bus Driver with 3-state Outputs ADE-205-207 (Z) Preliminary 1st.
Edition January 1998 Description This 20-bit universal bus driver is designed for 2.
3 V to 3.
6 V VCC operation.
Data flow from A to Y is controlled by the output enable (OE ) input.
The device operates in the transparent mode when the latch enable (LE) input is low.
When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level.
If LE is high, the A data is stored in the latch flip flop on the low to high transition of CLK.
When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE shoul...

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