HD74HC73 Dual J-K Flip-Flops (with Clear) Description The flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.
Each flip-flop has independent, J, K, clock, and clear inputs and Q and Q outputs.
Clear is independent of the clock and accomplished by a low level on the input.
Features • • • • • High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Clear L H H H H H H H L H Clock X J X L L H H X X X K X L H L H X X X Outpu...

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