S T M4437 S amHop Microelectronics C orp.
Aug.
18 2004 P -C hannel E nhancement Mode MOS FE T P R ODUC T S UMMAR Y V DS S -30V F E AT UR E S ( m W ) Max ID -10A R DS (ON) S uper high dense cell design for low R DS (ON ).
13 @ V G S = -20V 14 @ V G S = -10V 24 @ V G S = -4.
5V R ugged and reliable.
S urface Mount P ackage.
D 8 D 7 D 6 D 5 S O-8 1 1 2 3 4 S S S G ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted) P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous a @ T J =125 C b -P ulsed Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange S ymbol V DS V GS ID IDM IS PD T J...

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