A1425A

v3.0 HiRel FPGAs Fe a t ur es • Low-Power 0.8µ CMOS Technology 32 0 0D X Fe a t ur es • Highly Predictable Performance with 100% Automatic Placement and Routing • Device Sizes from 1,200 to 20,000 Gates • Up to 6 Fast, Low-Skew Clock Networks • Up to 202 User-Programmable I/O Pins • • • • • • • • • More Than 500 Macro Functions Up to 1,276 Dedicated Flip-...