COVER DATA SHEET 2G bits DDR3 SDRAM EDJ2108DEBG (256M words × 8 bits) EDJ2116DEBG (128M words × 16 bits) Specifications • Density: 2G bits • Organization — 32M words × 8 bits × 8 banks (EDJ2108DEBG) — 16M words × 16 bits × 8 banks (EDJ2116DEBG) • Package — 78-ball FBGA (EDJ2108DEBG) — 96-ball FBGA (EDJ2116DEBG) — Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.
5V ± 0.
075V • Data rate — 2133Mbps/1866Mbps/1600Mbps/1333Mbps (max) • Spread Spectrum Clock (SSC) — Sweep rate: down spread 1% (20kHz to 60kHz) • 1KB page size (EDJ2108DEBG) — Row address: A0 to A14 — Column address: A0 to A9 • 2KB page size (EDJ2116DEBG) — Row address: A0 to A13 — Column address: A0 to A9 •...

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