GTLP36T612 36-Bit LVTTL/GTLP Universal Bus Transceiver September 2001 Revised July 2002 GTLP36T612 36-Bit LVTTL/GTLP Universal Bus Transceiver General Description The GTLP36T612 is an 36-bit universal bus transceiver which provides LVTTL to GTLP signal level translation.
It allows for transparent, latched and clocked modes of data transfer.
The device provides a high speed interface for cards operating at LVTTL logic levels and a backplane operating at GTLP logic levels.
High speed backplane operation is a direct result of GTLP’s reduced output swing ( 1V), reduced input threshold levels and output edge rate control.
The edge rate control minimizes bus settling time.
GTLP is a Fairchild S...

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