GTLP6C816A LVTTL-to-GTLP Clock Driver August 1998 Revised August 1999 GTLP6C816A LVTTL-to-GTLP Clock Driver General Description The GTLP6C816A is a clock driver that provides LVTTL to GTLP signal level translation (and vice versa).
The device provides a high speed interface between cards operating at LVTTL logic levels and a backplane operating at GTL(P) logic levels.
High speed backplane operation is a direct result of GTL(P)’s reduced output swing (1V), reduced input threshold levels and output edge rate control.
The edge rate control minimizes bus settling time.
GTLP is a Fairchild Semiconductor derivative of the Gunning Transceiver logic (GTL) JEDEC standard JESD8-3.
Fairchild’s GTL(P...

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