GTLP6C817 Low Drive GTLP-to-LVTTL 1:6 Clock Driver June 1999 Revised August 1999 GTLP6C817 Low Drive GTLP-to-LVTTL 1:6 Clock Driver General Description The GTLP6C817 is a low drive clock driver that provides TTL to GTLP signal level translation (and vice versa).
The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels.
High speed backplane operation is a direct result of GTLP’s reduced output swing (1V), reduced input threshold levels and output edge rate control.
The edge rate control minimizes bus settling time.
GTLP is a Fairchild Semiconductor derivative of the Gunning Transceiver logic (GTL) JEDEC standard J...

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