COVER PRELIMINARY DATA SHEET 4G bits DDR3L SDRAM EDJ4204EFBG (1024M words × 4 bits) EDJ4208EFBG (512M words × 8 bits) EDJ4216EFBG (256M words × 16 bits) Specifications • Density: 4G bits • Organization — 128M words × 4 bits × 8 banks (EDJ4204EFBG) — 64M words × 8 bits × 8 banks (EDJ4208EFBG) — 32M words × 16 bits × 8 banks (EDJ4216EFBG) • Package — 78-ball FBGA (EDJ4204EFBG, EDJ4208EFBG) — 96-ball FBGA (EDJ4216EFBG) — Lead-free (RoHS compliant) and Halogen-free • Power supply: 1.
35V (typ) — VDD = 1.
283V to 1.
45V — Backward compatible for VDD, VDDQ = 1.
5V ± 0.
075V • Data rate — 1600Mbps/1333Mbps (max) • 1KB page size — Row address: A0 to A15 — Column address: A0 to A9, A11 (EDJ4204EFBG) A0...

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