ASM5P2304A 3.
3 V Zero Delay Buffer Description ASM5P2304A is a versatile, 3.
3 V zero−delay buffer designed to distribute high−speed clocks in PC, workstation, datacom, telecom and other high−performance applications.
It is available in 8−pin package.
The part has an on−chip PLL which locks to an input clock presented on the REF.
The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs.
The input−to−output propagation delay is guaranteed to be less than ±250 pS, and the output−to−output skew is guaranteed to be less than 200 pS.
ASM5P2304A has two banks of two outputs each.
Multiple ASM5P2304A devices can accept the same input clock and distribute it.
...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)