P3P85R01A 3.
3V, 75 MHz to 200 MHz LVCMOS TIMING SAFE] Peak EMI Reduction Device Functional Description P3P85R01A is a versatile, 3.
3 V, LVCMOS, wide frequency range, TIMING SAFE Peak EMI reduction device.
TIMING SAFE technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path.
Refer to Figure 3.
P3P85R01A has an SSEXTR pin that selects different frequency deviations depending upon the value of the resistor connected between this pin and GND.
P3P85R01A has a DLY_CTRL pin used for adjusting the Input-Output clock delay, depending upon the value of capacitor connected at this pin to GND.
The DLY_CTRL output ph...

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