SL23EP09  Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB) Key Features • 10 to 220 MHz operating frequency range • Low output clock skew: 45ps-typ • Low output clock jitter:  50 ps-typ cycle-to-cycle jitter  20 ps-typ period jitter • Low part-to-part output skew: 90 ps-typ • Wide 2.
5 V to 3.
3 V power supply range • Low power dissipation:  26 mA-max at 66 MHz and VDD=3.
3 V  24 mA-max at 66 MHz and VDD=2.
5V • One input drives 9 outputs organized as 4+4+1 • Select mode to bypass PLL or tri-state outputs • SpreadThru™ PLL that allows use of SSCG • Standard and High-Drive options • Available in 16-pin SOIC and TSSOP packages • Available in Commercial and Industrial grades Applicat...

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