Part Number
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54AC109 |
Manufacturer
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National Semiconductor |
Description
|
Dual JK Positive Edge-Triggered Flip-Flop |
Published
|
Feb 15, 2007 |
Detailed Description
|
54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
August 1998
54AC109 • 54ACT109 Dual ...
|
Datasheet
|
54AC109
|
Overview
54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
August 1998
54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
General Description
The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops.
The clocking operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D flip-flop (refer to ’AC/’ACT74 data sheet) by connecting the J and K inputs together.
Asynchronous Inputs: LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH
Features
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