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PRELIMINARY
3.
3V ABT16-Bit Transparent D-Type Latches
1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE 24 25 1 48 1LE 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8
54LVTH16373
Logic Diagram (PositiveLogic) 1/24
1OE/2OE
1LE/2LE
48/25
C1 1D1/2D1 47/36 1D
54LVTH16373
2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2LE
2/13
1Q1/2Q1
To Seven Other Channels
Logic Diagram
Memory
FEATURES:
• 3.
3V low
voltage advanced Bi
CMOS technology (LVT) 16bit transparent D-type latches with 3-state outputs • Total dose hardness: - 100 krad (Si), dependent upon space mission • Single event effect: - SELTH : No LU 119 MeV/mg/cm2 • Pac...