74HC4020; 74HCT4020 14-stage binary ripple counter Rev.
6 — 3 February 2016 Product data sheet 1.
General description The 74HT4020; 74HCT4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and 12 buffered parallel outputs (Q0, and Q3 to Q13).
The counter advances on the HIGH-to-LOW transition of CP.
A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP.
Each counter stage is a static toggle flip-flop.
This device features reduced input threshold levels to allow interfacing to TTL logic levels.
Inputs also include clamp diodes, this enables the use of current limiting resistors to i...

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