74LVC3G16
Triple buffer
Rev.
3 — 12 May 2021
Product data sheet
1.
General description
The 74LVC3G16 provides three buffers.
The inputs can be driven from either 3.
3 V or 5 V devices.
This feature allows the use of the 74LVC3G16 as a translator in a mixed 3.
3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
2.
Features and benefits
• Wide supply
voltage range from 1.
65 V to 5.
5 V • 5 V tolerant input/output for interfacing with 5 V logic • High noise immunity • Complies with JEDEC standard:
• JESD8-7 (1.
65 V to 1.
95...