74VHC595-Q100;
74VHCT595-Q100
8-bit serial-in/serial-out or parallel-out shift register with
output latches
Rev.
2 — 25 June 2020
Product data sheet
1.
General description
The 74VHC595-Q100; 74VHCT595-Q100 are high-speed Si-gate
CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL).
It is specified in compliance with JEDEC standard No.
7A.
The 74VHC595-Q100; 74VHCT595-Q100 are 8-stage serial shift registers with a storage register and 3-state outputs.
The shift registers have separate clocks.
Data is shifted on the positive-going transitions of the shift register clock input (SHCP).
The data in each register is transferred to the storage register on a positive-going ...