ADC08B200 www.
ti.
com SNAS388F – MARCH 2007 – REVISED APRIL 2013 ADC08B200 / ADC08B200Q 8-Bit, 200 MSPS A/D Converter with Capture Buffer Check for Samples: ADC08B200 FEATURES 1 •2 Single-Ended Input • Selectable Capture Buffer Size • PLL for Clock Multiplication • Reference Ladder Top and Bottom Accessible • Linear Power Scaling with Sample Rate • FPGA Training Pattern • AEC-Q100 Grade 2 Qualified • Power-Down Feature APPLICATIONS • Laser Ranging • RADAR • Pulse Capturing KEY SPECIFICATIONS (PLL Bypassed) • Resolution 8 Bits • Maximum Sampling Frequency 200 MSPS (min) • DNL ±0.
4 LSB (typ) • ENOB (fIN= 49 MHz) 7.
2 bits (typ) • THD (fIN= 49 MHz) −53 dBc (typ) • Power Consumption – Operatin...

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