ADS5270
SBAS293D − JANUARY 2004 − REVISED MAY 2004
8-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface
FEATURES
D D D D D D D D D D D D D D D D D D D
Maximum Sample Rate: 40MSPS 12-Bit Resolution No Missing Codes Power Dissipation: 907mW
CMOS Technology Simultaneous Sample-and-Hold 70.
5dB SNR at 10MHz IF Internal and External References 3.
3V Digital/Analog Supply Serialized LVDS Outputs Integrated Frame and Synch Patterns MSB and LSB First Modes Option to Double LVDS Clock Output Currents Pin- and Format-Compatible Family TQFP-80 PowerPAD Package
or LSB first.
The bit coinciding with the rising edge of the 1x clock output is the first bit of the word.
Data is to be latched by the rec...