ADS61B29 ADS61B49
www.
ti.
com SLWS214B – OCTOBER 2008 – REVISED MAY 2009
14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer
FEATURES
1
• Integrated High Impedance Analog Input Buffer
• Maximum Sample Rate: 250 MSPS • 14-Bit Resolution – ADS61B49 • 12-Bit Resolution – ADS61B29 • 790 mW Total Power Dissipation at 250 MSPS • Double Data Rate (DDR) LVDS and Parallel
CMOS Output Options
• Programmable Fine Gain up to 6 dB for SNR/SFDR Trade-Off and 1-Vpp Full-Scale Operation
• DC Offset Correction • Supports Input Clock Amplitude Down to 400
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