Part Number
|
AND4 |
Manufacturer
|
AMI |
Description
|
CMOS Gate Array |
Published
|
Mar 12, 2018 |
Detailed Description
|
Core Logic
$1'[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
ANDx is a family of AND-NOR circuits consisting of tw...
|
Datasheet
|
AND4
|
Overview
Core Logic
$1'[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
ANDx is a family of AND-NOR circuits consisting of two 3-input AND gates and one 2-input AND gate into a 3-input NOR gate.
Logic Symbol
Truth Table
A
ANDx
ABCDE FGHQ
B
C HHHXXXXX L
D E
Q XXXHHHXX L
F XXXXXXHHL
G
All other combinations
H
H
HDL Syntax Verilog ANDx inst_name (Q, A, B, C, D, E, F, G, H); VHDL.
.
inst_name: ANDx port map (Q, A, B, C, D, E, F, G, H);
Pin Loading
Pin Name
A B C D E F G H
AND2 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0
Equivalent Loads AND4 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0
AND6 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1 2.
1
3-31
$1'[
$0,+* PLFURQ &026 *DWH $UUD...
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