DRAM
Austin Semiconductor, Inc.
4 MEG x 16 DRAM
Extended Data Out (EDO) DRAM
FEATURES
• Single +3.
3V ±0.
3V power supply.
• Industry-standard x16 pinout, timing, functions, and package.
• 12 row, 10 column addresses • High-performance
CMOS silicon-gate process • All inputs, outputs and clocks are LVTTL-compatible • Extended Data-Out (EDO) PAGE MODE access • 4,096-cycle CAS\-BEFORE-RAS\ (CBR) REFRESH distributed across 64ms • Optional self refresh (S) for low-power data retention • Level 1 Moisture Sensitivity Rating, JEDEC J-STD-020
AS4LC4M16
PIN ASSIGNMENT (Top View)
50-Pin TSOP (DG)
OPTIONS
• Package(s) 50-pin TSOP (400-mil) com • Timing 50ns access 60ns access • Refresh ...