3.3V 128K X 32/36 SRAM
December 2002 AS7C33128NTD32A AS7C33128NTD36A 9 .î 65$0 ZLWK 17'TM Features • Organization: 131,072 words × 32 or 36 bits NTD™1 architecture for efficient bus operation • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.5/4.0/5.0 ns • Fast OE access time: 3.5/4.0/5.0 ns • Fully synchronous operation • Flow-through o...
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