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Features
• Fast Read Access Time – 90 ns • Automatic Page Write Operation • • • • • • • •
– Internal Address and Data Latches for 64 Bytes – Internal Control Timer Fast Write Cycle Times – Page Write Cycle Time: 3 ms Maximum – 1 to 64-byte Page Write Operation Low Power Dissipation: 300 µA Standby Current (
CMOS) Hardware and Software Data Protection DATA Polling for End of Write Detection High Reliability
CMOS Technology – Endurance: 105 Cycles – Data Retention: 10 Years Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs JEDEC Approved Byte-wide Pinout
256 (32K x 8) High-speed Parallel EEPROM AT28HC256N
Description
The AT28HC256N is a high-performance ele...