v2.
7
Axcelerator Family FPGAs
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™
Leading-Edge Performance
• • • • • • • • • 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Up to 2 Million Equivalent System Gates Up to 684 I/Os Up to 10,752 Dedicated Flip-Flops Up to 295 kbits Embedded SRAM/FIFO Manufactured on Advanced 0.
15 μm
CMOS Antifuse Process Technology, 7 Layers of Metal Single-Chip, Nonvolatile Solution Up to 100% Resource Utilization with 100% Pin Locking 1.
5V Core
Voltage for Low Power Footprint Compatible Packaging Flexible, Multi-Standard I/Os: – 1.
5V, 1.
8V, 2.
5V, 3.
3V Mixed
Voltage Operation – Bank-Selectable I/Os – 8 Banks per Chip – Single-Ended I/O ...