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CDC351.
CDC351I 1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS
SCAS441D – FEBRUARY 1994 – REVISED OCTOBER 2003
FEATURES
• Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications
• Operates at 3.
3-V VCC • LVTTL-Compatible Inputs and Outputs
• Supports Mixed-Mode Signal Operation (5-V Input and Output
Voltages With 3.
3-V VCC)
• Distributes One Clock Input to Ten Outputs
• Distributed VCC and Ground Pins Reduce Switching Noise
• High-Drive Outputs (–32-mA IOH, 32-mA IOL) • State-of-the-Art EPIC-IIB™ Bi
CMOS Design
Significantly Reduces Power Dissipation
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages
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