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CDCM7005-SP
SGLS390G – JULY 2009 – REVISED NOVEMBER 2015
CDCM7005-SP 3.
3-V High Performance Rad-Tolerant Class V, Clock Synchronizer and Jitter Cleaner
1 Features
•1 High Performance LVPECL and LV
CMOS PLL Clock Synchronizer
• Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support With Manual or Automatic Selection
• Accepts LV
CMOS Input Frequencies Up to 200 MHz
• VCXO_IN Clock is Synchronized to One of the Two Reference Clocks
• VCXO_IN Frequencies Up to 2 GHz (LVPECL)
• Outputs can be a Combination of LVPECL and LV
CMOS (Up to Five Differential LVPECL Outputs or Up to 10 LVCMO...