CDCU877, CDCU877A www.
ti.
com FEATURES • 1.
8-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications • Spread Spectrum Clock Compatible • Operating Frequency: 10 MHz to 400 MHz • Low Current Consumption: 135 mA • Low Jitter (Cycle-Cycle): ±30 ps • Low Output Skew: 35 ps • Low Period Jitter: ±20 ps • Low Dynamic Phase Offset: ±15 ps 1.
8-V PHASE LOCK LOOP CLOCK DRIVER SCAS688D – JUNE 2005 – REVISED JULY 2007 • Low Static Phase Offset: ±50 ps • Distributes One Differential Clock Input to Ten Differential Outputs • 52-Ball μBGA (MicroStar™ Junior BGA, 0,65-mm pitch) and 40-Pin MLF • External Feedback Pins (FBIN, FBIN) are Used to Synchronize the Outputs to the Input Clocks • ...

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