Small Signal Transistor
PROCESS CP337V Small Signal Transistor NPN - Saturated Switch Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY EPITAXIAL PLANAR 29 x 29 MILS 7.1 MILS 11.8 x 4.5 MILS 11.8 x 4.5 MILS Al - 30,000Å Au-As - 13,000Å GROSS DIE PER 4 INCH WAFER 13,19...
Central Semiconductor