Part Number
|
DF1F2 |
Manufacturer
|
AMI |
Description
|
CMOS Gate Array |
Published
|
Mar 12, 2018 |
Detailed Description
|
Core Logic
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®
$0,+* PLFURQ &026 *DWH $UUD\
Description
DF1Fx is a family of static, master-slave D flip-flo...
|
Datasheet
|
DF1F2
|
Overview
Core Logic
'))[
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
DF1Fx is a family of static, master-slave D flip-flops without SET or RESET.
Outputs are buffered and change state on the rising edge of the clock.
Logic Symbol
Truth Table
DF1Fx DQ C
Q
D C Q QN XX L H L ↑LH H↑HL X L NC NC
NC = No Change
HDL Syntax Verilog DF1Fx inst_name (Q, QN, C, D); VHDL.
.
inst_name: DF1Fx port map (Q, QN, C, D)
Pin Loading
Pin Name D C
DF1F1 1.
0 1.
0
Equivalent Loads
DF1F2
DF1F4
1.
0 1.
0
1.
0 1.
0
DF1F6 1.
0 1.
0
Size And Power Characteristics
Power Characteristicsa
Cell Equivalent Gates
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
DF1F1
7.
0
TBD
17...
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