DS34F86/DS35F86 RS-422/RS-433 Quad Line Receiver with TRI-STATE Outputs
DS34F86/DS35F86
February 1996
DS34F86/DS35F86 RS-422/RS-423 Quad Line Receiver with TRI-STATE ® Outputs
General Description
The DS34F86/DS35F86 RS-422/3 Quad Receiver features four independent receivers, which comply with EIA Standards for the electrical characteristics of balanced/ unbalanced
voltage digital interface circuits.
Receiver outputs are 74LS compatible TRI-STATE structures which are forced to a high impedance state when the appropriate output control lead reaches a logic zero condition.
A PNP device buffers each output control lead to assure minimum loading for either logic one or logic zero inputs.
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