DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link— 65 MHz
July 1997
DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link— 65 MHz
General Description
The DS90CF563 transmitter converts 21 bits of
CMOS/TTL data into three LVDS (Low
Voltage Differential Signaling) data streams.
A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link.
Every cycle of the transmit clock 21 bits of input data are sampled and transmitted.
The DS90CF564 receiver converts the LVDS data streams back into 21 bits of
CMOS/TTL data.
At a transmit clock frequency of 65 MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLIN...