DATA SHEET
64M bits SDRAM
EDS6416AHBH, EDS6416CHBH (4M words × 16 bits)
Description
The EDS6416AHBH, EDS6416CHBH are 64M bits SDRAMs organized as 1,048,576 words × 16 bits × 4 banks.
All inputs and outputs are synchronized with com the positive edge of the clock.
Supply
voltages are 3.
3V (EDS6416AHBH) and 2.
5V (EDS6416CHBH).
It is packaged in 60-ball FBGA.
Pin Configurations
/xxx indicate active low signal.
60-ball FBGA
1 A VSS B
DQ15 DQ0 VDD
2
3
4
5
6
7
Features
• • • • • 3.
3V and 2.
5V power supply Clock frequency: 166MHz/133MHz (max.
) Single pulsed /RAS ×16 organization 4 banks can operate simultaneously and independently • Burst read/write operation and burst read...