Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
60V
RDSON (MAX.
)
60mΩ
ID 5A
UIS, Rg 100% Tested
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source
Voltage
VGS
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 100 °C
ID IDM
Avalanche Current
IAS
Avalanche Energy Repetitive Avalanche Energy2
L = 0.
1mH, ID=12A, RG=25Ω
L = 0.
05mH
EAS EAR
Power Dissipation
TA = 25 °C TA = 100 °C
Operating Junction & Storage Temperature Range
PD Tj, Tstg
100% UIS testing in condition of VD=30V, L=0.
...