HCC/HCF4031B
64-STAGE STATIC SHIFT REGISTER
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FULLY STATIC OPERATION : DC to 16MHz (TYP.
) @ VDD – VSS = 15V STANDARD TTL DRIVE CAPABILITY ON Q OUTPUT RECIRCULATION CAPABILITY THREE CASCADING MODES : DIRECT CLOCKING FOR HIGH-SPEED OPERATION DELAYED CLOCKING FOR REDUCED CLOCK DRIVE REQUIREMENTS ADDITIONAL 1/2 STAGE FOR SLOW CLOCKS QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V, AND 15V PARAMETRIC RATINGS INPUT CURRENT OF 100nA at 18V AND 25°C FOR HCC DEVICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD NO.
13A, ”STANDARD SPECIFICATIONS FOR DESCRIPTION OF ”B” SERIES
CMOS DEVICE...