Part Number
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HD74CDC2510B |
Manufacturer
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Hitachi Semiconductor |
Description
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3.3-V Phase-lock Loop Clock Driver |
Published
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Mar 23, 2005 |
Detailed Description
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HD74CDC2510B
3.3-V Phase-lock Loop Clock Driver
ADE-205-219F (Z) 7th. Edition October 1999 Description
The HD74CDC2510B...
|
Datasheet
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HD74CDC2510B
|
Overview
HD74CDC2510B
3.
3-V Phase-lock Loop Clock Driver
ADE-205-219F (Z) 7th.
Edition October 1999 Description
The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver.
It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.
It is specifically designed for use with synchronous DRAMs.
The HD74CDC2510B operates at 3.
3 V VCC and is designed to drive up to five clock loads per output.
Bank of outputs provide ten low-skew, low-jitter copies of the input clock.
Output signal duty cycles are adjusted to 50 percent independent of the duty cycle at the input clock.
Bank of outputs can be e...
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