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HD74LV2G125A
Dual Bus Buffer with 3–state Output
REJ03D0099–0500Z (Previous ADE-205-347D (Z)) Rev.
5.
00 Sep.
30.
2003
Description
The HD74LV2G125A has dual bus buffer with 3–state output in a 8 pin package.
Output is disabled when the associated output enable (OE) input is high.
To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the resistor is determined by the current souring capability of the driver.
Low
voltage and high-speed operation is suitable for the battery powered products (e.
g.
, notebook computers), and the low power consumption extends the battery life.
Features
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