HM5425801B Datasheet - 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank

HM5425161B Series HM5425801B Series HM5425401B Series 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword × 16-bit × 4-bank/8-Mword × 8-bit × 4-bank/ 16-Mword × 4-bit × 4-bank E0086H20 (Ver.
2.
0) Jan.
23, 2002 Description The HM5425161B, the HM5425801B and the HM5425401B are the Double Data Rate (DDR) SDRAM devices.
Read and write operations are performed at the cross points of the CLK and the CLK.
This high speed data transfer is realized by the 2-bit prefetch piplined architecture.
Data strobe (DQS) both for read and write are available for high speed and reliable data bus design.
By setting extended mode resistor, the on-chip Delay Locked Loop (DLL) can be set enable ...

Part Number	HM5425801B
Manufacturer	Elpida Memory
Description	256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-Mword 16-bit 4-bank/8-Mword 8-bit 4-bank/ 16-Mword 4-bit 4-bank
Published	Mar 26, 2005
Detailed Description	HM5425161B Series HM5425801B Series HM5425401B Series 256M SSTL_2 interface DDR SDRAM 143 MHz/133 MHz/125 MHz/100 MHz 4-...
Datasheet	HM5425801B