QUADRACLOCK QUADRATURE DELAY BUFFER DATASHEET ICS672-01/02 Description The ICS672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals.
Based on IDT’s proprietary low jitter Phase-Locked Loop (PLL) techniques, each device provides five low-skew outputs, with clock rates up to 84 MHz for the ICS672-01 and up to 135 MHz for the ICS672-02.
By providing outputs delayed one quarter clock cycle, the device is useful for systems requiring early or late clocks.
The ICS672-01/02 include multiplier selections of x0.
5, x1, x2, x3, x4, x5, or x6.
They also offer a mode to power-down all internal circuitry and tri-state the outputs.
In normal operation,...

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