Integrated Circuit Systems, Inc.
ICS93716 Low Cost DDR Phase Lock Loop Clock Driver Recommended Application: DDR Clock Driver Product Description/Features: • Low skew, low jitter PLL clock driver • I2C for functional and output control • Feedback pins for input to output synchronization • Spread Spectrum tolerant inputs Switching Characteristics: • PEAK - PEAK jitter (66MHz): 120ps • PEAK - PEAK jitter (100MHz): 75ps • CYCLE - CYCLE jitter (100MHz):65ps • OUTPUT - OUTPUT skew: 100ps • Output Rise and Fall Time: 650ps - 950ps Pin Configuration CLKC0 CLKT0 VDD CLKT1 CLKC1 GND SCLK CLK_INT CLK_INC VDDA GND VDD CLKT2 CLKC2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 1...

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