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IDCR0

CMOS Gate Array

Description

,'&5 $0,+*  PLFURQ &026 *DWH $UUD\ Description IDCR0 is a non-buffered, resistive analog interface input piece with ESD protection. Logic Symbol Truth Table Pin Loading IDCR0 QC P PADM D PADM QC LL HH PADM Load 4.90 pF ® HDL Syntax Verilog .................... IDCR0 inst_name (QC, PADM); VHDL...................... inst_name: IDCR0 port map (Q...


AMI

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