256K X 36, 512K X 18 3.
3V Synchronous SRAMs 2.
5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect x x IDT71V67602 IDT71V67802 Features 256K x 36, 512K x 18 memory configurations Supports high system speed: – 166MHz 3.
5ns clock access time – 150MHz 3.
8ns clock access time – 133MHz 4.
2ns clock access time LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) 3.
3V core power supply Power down controlled by ZZ input 2.
5V I/O supply (VDDQ) Packaged in a JEDEC Standard 100-pin plastic thin quad flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball grid array.
Description Th...

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