com IDTCSPF2510C 3.
3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE 3.
3V PHASE-LOCK LOOP CLOCK DRIVER IDTCSPF2510C FEATURES: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs • Output enable bank control • External feedback (FBIN) pin is used to synchronize the output to the clock input signal • On-chip series damping resistors with each driver • No external RC network required for PLL loop stability • Operates at 3.
3V VDD • tpd Phase Error at 133MHz: ±150ps • Jitter (cycle-cycle)(peak-to-peak) at 66MHz to 133MHz: | 70 | ps • Spread Spectrum Compatible • Operating frequency 25MH...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)